Nov 2019 – May 2023 · 3 yrs 6 mos

• DFT Solutions

Dec 2017 – Nov 2019 · 1 yr 11 mos

• DFT solutions

Jun 2010 – Dec 2017 · 7 yrs 6 mos

• Synthesis, DFT, ATPG
• Key Projects:
• DFTMAX Ultra Product Management
• Manage the project through various stages of product development cycle:
• Inception & R&D Implementation
• Drive weekly scrum (core team) meetings involving R&D, CAE, Marketing and Techpubs
• Manage associated challenges
• For Eg: Product required support for almost all DFTC/ TetraMAX flows and features [DFT,ATPG, SpyGlass, Automotive and diagnostics] in a phased manner
• Validation
• Lead the CAE efforts for this project involving Test CAEs, that included senior technologists, based out of India and US
• Deployment and customer engagement
• Single point of contact for worldwide ACs
• Work closely with marketing, ACs, and account teams (sales) to drive growth and ensure customer satisfaction
• Drive the training sessions at various forums like test fest, SNUG and workshops
• Guide the field team for evaluation success, provide resource support
• Working with customer
• Drive direct customer meetings
• Facilitate excellent post deployment support
• Prioritize STAR/ Case Management

Oct 2004 – Jun 2010 · 5 yrs 8 mos

• During these years I primarily worked on DFT and ATPG (TetraMAX/ DFTMAX). Key domains that I worked on was Low Power ATPG, parallel ATPG and scan compression.

Aug 2000 – Oct 2004 · 4 yrs 2 mos

• ## IBM Microelectronics, Essex Jct, VT, USA ##
• Run test cases to study the improvement in tester buffer memory and test time with the help of OPMISR in IBM ASICs.
• Create macro test for various IOs, embedded cores, PLLs, SRAMs and IBM Power PC cores.
• Lead Test modeling effort for all IBM digital cores.
• Work on transferring the project to Bangalore design centre.
• ## IBM Engineering and Technology Services, Bangalore ##
• Develop a DFT methodology for IBM’s Customer Owned Tooling (COT) flow, to develop an ASIC design flow that’s foundry independent.
• Create delay test and Stuck-At-Test for the ASICs manufactured by IBM Microelectronics division.
• Qualify the IBM Test methodology on relevant ASICs and act as an interface between the tester team and Cadence application engineers to resolve issues.