Sana Bano

DevOps Engineer

Bengaluru, Karnataka, India8 yrs 2 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 7 years of experience in Physical Design.
  • Expertise in Timing Closure and Static Timing Analysis.
  • Proficient in Cadence Virtuoso and related tools.
Stackforce AI infers this person is a Physical Design Engineer with extensive experience in VLSI design.

Contact

LinkedIn

Skills

Other Skills

Physical DesignFloorplanningTiming ClosureLogic SynthesisClock Tree SynthesisStatic Timing AnalysisTiming verificationPlace and RouteDesign Rule Checking (DRC)Layout Versus Schematic (LVS)Reliability verificationCadence Virtuosoassura

About

Having 7+ years of experience in Physical Design Industry.

Experience

8 yrs 2 mos
Total Experience
2 yrs
Average Tenure
4 yrs 8 mos
Current Experience

Amd

2 roles

Member of Technical Staff

Promoted

Jun 2025 – Present · 11 mos

Sr. Silicon Design Engineer

Sep 2021 – Jun 2025 · 3 yrs 9 mos

Altran

Physical Design Engineer

Jun 2019 – Aug 2021 · 2 yrs 2 mos · Coimbatore, Tamil Nadu, India

Aricent

Physical Design Trainee

Jul 2018 – Jul 2019 · 1 yr

Sumedha design systems

Physical Design Trainee Engineer

Jan 2018 – Jun 2018 · 5 mos · Hyderabad Area, India

Education

CVR College of Engineering, Hyderabad

Master of Technology - MTech — VLSI system design

Jan 2015 – Jan 2017

Sridevi Women's Engineering College

Bachelors of Technology — Electronics and Communication Engineering

Jan 2011 – Jan 2015

Dilsukhnagar Public School

Jan 1996 – Jan 2009

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