Jayprakash Y.

Software Engineer

Prayagraj, Uttar Pradesh, India1 yr 10 mos experience

Key Highlights

Expert in low-power design methodologies.
Proficient in generating UPF files for power management.
Hands-on experience with Power Analysis using PTPX.

Stackforce AI infers this person is a VLSI Engineer specializing in semiconductor design and verification.

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Skills

Other Skills

LinuxSystemVerilogSilvaco TCADApplication-Specific Integrated Circuits (ASIC)Digital DesignsDigital IC DesignPhysical design flowComputer Organisation and ArchitectureAMBAFIFOElectronicsRTL DesignIntel 8085Static Timing AnalysisCadence Virtuoso

About

As a VLSI Engineer with intermediate experience, I specialize in low-power design methodologies and have a strong technical foundation in various aspects of chip design and verification. My expertise includes generating Unified Power Format (UPF) files and performing checks on Clock Latency Paths (CLP) for efficient power management. I have hands-on experience with Power Analysis using PTPX, ensuring optimal power performance in designs. Additionally, I possess comprehensive knowledge in Clock Domain Crossing (CDC) analysis, linting, synthesis, and Logic Equivalence Checking (LEC), enabling me to deliver robust and reliable semiconductor solutions. Driven by a passion for innovation and precision, I continuously seek to enhance my skills and contribute to cutting-edge VLSI projects. Let's connect to explore potential collaborations and advancements in the semiconductor industry.