Vishwateja Tanugula — Software Engineer
Motivated Engineer with a strong passion for VLSI and industry experience in SoC Design Verification. Having academic proficiency in the field of VLSI design and Embedded systems with solid understanding of CMOS IC Design, Digital Logic Design, Computer Architecture, and Protocols. Skills : Digital logic and circuit design, Computer Architecture, VLSI design, Verilog, SystemVerilog, UVM, FPGA architecture, ARM7 and RISC V ISA, Linux OS, Synopsys Verdi, Cadence JasperGold, Xilinx Vivado, Cadence Virtuoso
Stackforce AI infers this person is a Semiconductor Verification Engineer with a focus on VLSI and SoC design.
Location: Hyderabad, Telangana, India
Experience: 2 yrs 3 mos
Skills
- Vlsi Design
- Soc Design Verification
Career Highlights
- Expert in VLSI design and SoC verification.
- Proficient in UVM and formal verification methodologies.
- Strong academic background with a 9.25 GPA.
Work Experience
Intel Corporation
SoC Design Verification Engineer (1 yr 10 mos)
SoC Design Verification Engineer (5 mos)
BITS Pilani, Hyderabad Campus
Graduate Teaching Assistant (1 yr 4 mos)
Deloitte India (Offices of the US)
Analyst (5 mos)
Defence Research and Development Laboratory (DRDL) - DRDO
Intern (1 mo)
Education
Master of engineering - ME at BITS Pilani, Hyderabad Campus
Bachelor of Engineering - BE at Chaitanya Bharathi Institute Of Technology
Intermediate at Narayana Junior College - India
class 9 & 10 at Narayana Olympiad school
class 1 to 8 at St.claire high school
