Ankur Tiwari

Software Engineer

Bengaluru, Karnataka, India8 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expertise in Physical Design and VLSI.
  • Strong background in Timing Closure and Verification.
  • Proficient in multiple programming languages including C and Perl.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in Physical Design and Timing Analysis.

Contact

LinkedIn

Skills

Core Skills

Physical DesignVery-large-scale Integration (vlsi)

Other Skills

Timing ClosureTimingClockingCPerlFloorplanningPhysical VerificationLayout Versus Schematic (LVS)Design Rule Checking (DRC)TCL

About

I am a part of RTL physical design team at AMD

Experience

8 yrs 10 mos
Total Experience
4 yrs
Average Tenure
9 mos
Current Experience

Amd

Member of Technical Staff

Sep 2025 – Present · 8 mos

Timing ClosureTimingClockingPhysical DesignVery-Large-Scale Integration (VLSI)C+6

Intel corporation

Physical Design Engineer

Jan 2019 – Sep 2025 · 6 yrs 8 mos · Bengaluru, Karnataka, India

TimingClockingPhysical Design

Analog devices

Layout Design Engineer

Aug 2017 – Jan 2019 · 1 yr 5 mos · Bengaluru, Karnataka, India

Education

Indian Institute of Technology, Roorkee

M.Tech — Microelectronics & VLSI

Jan 2012 – Jan 2014

Bhilai Institute of Technology (BIT), Durg

Bachelor of Engineering - BE — Electronics and Telecommunication Engineering

Jan 2008 – Jan 2012

Stackforce found 100+ more professionals with Physical Design & Very-large-scale Integration (vlsi)

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