Himanshu Verma

Software Engineer

Delhi, India12 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 10 years of experience in physical design.
  • Expertise in multiple technology nodes.
  • Strong background in EDA implementation tools.
Stackforce AI infers this person is a VLSI design expert with extensive experience in physical design and EDA tools.

Contact

Skills

Core Skills

Problem SolvingPower Optimization

Other Skills

Clock DistributionImplementation MethodologyCommunicationVerilogVHDLDigital Circuit DesignIntegrated Circuit DesignCNFET in Digital CircuitsC++Cadence VirtuosoMicrocontrollersVLSIEmbedded CSPICEModelSim

About

Completing 10 years of experience in physical design. Worked on several block-level partitions in challenging project environments with technology nodes. (14/11lpp/10/8lpu/5lpe/n5/n4). Involved in complete Physical Design flow with following core competencies: o Synthesis o Logical Equivalence o Place/CTS/Route o STA / Timing closure o ECO flows and convergence o Post Route flows o Signoffs Having background in different subsystem designs ( Graphics/Modem/CPU/Camera/Video and many MV complex designs ) and exposure to capibilities and strengths of EDA Implementation tools gives me a unique advantage to look at all Convergence/PPA challenges in a more holistic manner. • Technology node Experience: 10 nm, 14nm. 11lpp . 8lpu. 5lpe. 4lpx .n4 • Tools: Synopsys (DC-T, ICC,ICC2,PT, FC). • Programming skills in TCL, Shell scripting & Perl. Strong media and communication professional with a ME focused in Microelectronics from BITS Pilani.

Experience

12 yrs
Total Experience
4 yrs
Average Tenure
7 yrs 5 mos
Current Experience

Synopsys inc

4 roles

Senior Staff Engineer

Feb 2024Present · 2 yrs 3 mos

Staff Application Engineer

Promoted

Feb 2023Feb 2024 · 1 yr

Problem SolvingClock DistributionPower OptimizationImplementation MethodologyCommunication

Application Engineer, Sr 2

Nov 2020Jan 2023 · 2 yrs 2 mos

Application Engineer, Sr 1

Oct 2018Oct 2020 · 2 yrs

Intel corporation

2 roles

Senior Graphics Hardware Engineer

Promoted

Apr 2017Oct 2018 · 1 yr 6 mos

Graphics Hardware Engineer

Jul 2014Mar 2017 · 2 yrs 8 mos

Nvidia

Intern

Jan 2014Jun 2014 · 5 mos · Bangalore

  • The CSI unit implements the MIPI protocol for transferring pixel data from camera
  • sensors to the application processor. Functional model for CSI-2 Host is used for
  • replacing RTL during pipeline verification. This is used to verify functional model of
  • host and also acts as a source of image data for the complete camera pipeline to the
  • software driver level.

Education

Birla Institute of Technology and Science, Pilani

ME — Microelectronics

Jan 2012Jan 2014

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