Haritha Giddaluru

Software Engineer

Bengaluru, Karnataka, India9 yrs 6 mos experience
Highly Stable

Key Highlights

  • 1.6 years of experience in physical design.
  • Expertise in Timing fixes and PnR flow.
  • Proficient in advanced technology nodes.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Timing Analysis.

Contact

LinkedIn

Skills

Core Skills

Physical DesignTiming ClosureFloorplanning

Other Skills

Timing fixesPnR flowSynopsys toolsClock Tree SynthesisRoutingApplication-Specific Integrated Circuits (ASIC)Physical VerificationPNRStatic Timing Analysis

About

Having 1.6 years experience in physical design. Working on Timing fixes, PnR flow in advanced technology nodes.

Experience

9 yrs 6 mos
Total Experience
9 yrs 6 mos
Average Tenure
9 yrs 6 mos
Current Experience

Adept chips services pvt ltd

Physical Design Engineer

Feb 2019 – Present · 7 yrs 3 mos

  • working as a physical Design engineer at Western Digital.
Physical DesignTiming fixesPnR flowTiming Closure

Amd

Physical Design Engineer

Jun 2017 – Feb 2019 · 1 yr 8 mos · Bengaluru, Karnataka

  • Worked on Floor plan to Route stage, Timing fixes and DRC fixes at AMD, Hyderabad.

Adept chips services pvt ltd

2 roles

Physical Design Engineer

Feb 2017 – Present · 9 yrs 3 mos

Physical DesignSynopsys tools

Physical Design Trainee Engineer

Dec 2016 – May 2017 · 5 mos

  • Trained in PD.
  • Worked on ICC tool.

Education

S.S.I.E.T

B.tech — Electronics and Communications Engineering

Jan 2010 – Jan 2014

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