Pavan Kumar — DevOps Engineer
Expertise in Functional Verification using System Verilog. Expertise in Verification using Universal Verification Methodology (UVM 1.1). Proficient in Coverage Driven Verification and Formal Verification. Hands on TREK Gen-2.
Stackforce AI infers this person is a Verification Lead in the Semiconductor industry with expertise in ASIC and UVM.
Location: Bengaluru, Karnataka, India
Experience: 12 yrs 11 mos
Skills
- Functional Verification
Career Highlights
- Expert in Functional Verification using System Verilog.
- Proficient in Coverage Driven Verification and Formal Verification.
- Experienced Verification Lead with a strong background in UVM.
Work Experience
Cerium Systems
Verification Lead (2 yrs 5 mos)
Lead Engineer (3 yrs 9 mos)
Qualcomm
Engineer III (10 mos)
Intel Corporation
Lead Engineer (1 yr)
Sr. IC Design Verification Eng. (1 yr 8 mos)
Qualcomm
Engineer II (1 yr 3 mos)
Orange Semiconductors Pvt. Ltd.
ASIC Verification Engineer (10 mos)
GLOBALS RESEARCH INNOVATION
ASIC Design Verification Engineer (1 yr 1 mo)
CVC Pvt Ltd
Asic Design and Verification Engineer - Trainee (1 yr 11 mos)
Education
BE at HMSIT
+2 at JNV Tumkur
10 at Kendriya Vidyalaya
