Prashant Bhat

Product Manager

Bengaluru, Karnataka, India18 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Analog Layout IC Design with extensive semiconductor experience.
  • Strong automation coding skills in SKILL and PERL.
  • Proven track record in training and mentoring junior engineers.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog and Mixed Signal IC design.

Contact

LinkedIn

Skills

Core Skills

Integrated Circuit DesignAnalogRf

Other Skills

ASICEDADesign Rule Checking (DRC)DRCLayout Versus Schematic (LVS)SERDESCadence VirtuosoLVSMixed SignalLayout VerificationAutomationSKILLGUI DevelopmentTrainingPerl

About

Experienced Analog Layout IC Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in analog layouts of ADCs, PLLs, Tuner, Rx, Tx, etc.. Strong automation coding knowledge with SKILL, PERL, HTML basics etc.. Basic experience in hiring, training juniors etc.. Strong engineering professional with a Master of Science (M.S.) focused in Microelectronics from Manipal University and Diploma in Electronics and VLSI from NTTF, Bangalore.

Experience

18 yrs 7 mos
Total Experience
5 yrs 7 mos
Average Tenure
14 yrs 5 mos
Current Experience

Broadcom

6 roles

Principal Engineer - IC Design (custom layout)

Promoted

Nov 2023 – Present · 2 yrs 7 mos

ASICEDADesign Rule Checking (DRC)DRCLayout Versus Schematic (LVS)SERDES+5

Supervisor / Staff R&D Engineer - IC Design (Analog Layout)

Nov 2017 – Dec 2023 · 6 yrs 1 mo

  • worked on different flipchips and wirebond IP layouts and verification.
  • worked on different RF and Analog IPs and modules like ADCs, DACs, PGA, mixer, TUNER, PLL, RX/TX, PHY, AUDIO, serdes, DLL, DSL etc.
AnalogRF

Senior R&D Engineer - IC Design (Analog Layout)

Feb 2016 – Oct 2017 · 1 yr 8 mos

  • worked on different flipchips and wirebond IP layouts and verification.
  • worked on different RF and Analog IPs and modules like ADCs, DACs, PGA, mixer, TUNER, PLL, RX/TX, PHY, AUDIO, serdes, DLL, DSL etc.
AnalogRF

Staff II Engineer - IC Design

Jun 2014 – Jan 2016 · 1 yr 7 mos

  • worked on different flipchips and wirebond IP layouts and verification.
  • worked on different RF and Analog IPs and modules like ADCs, DACs, PGA, mixer, TUNER, PLL, RX/TX, PHY, AUDIO, serdes, DLL, DSL, REFGENs, LDOs etc.
AnalogRF

Staff I Engineer - IC Design

Mar 2013 – May 2014 · 1 yr 2 mos

  • * worked on different RF and Analog IPs and modules like ADCs, DACs, PGA, mixer, TUNER, PLL, RX/TX, PHY, etc.
AnalogRF

Engineer - IC Design (Custom Analog Layout)

Sep 2011 – Feb 2013 · 1 yr 5 mos

  • * worked on Analog IPs and modules like PLL, RX/TX, headset drivers, serdes, DLL, DSL, LDOs, etc.
AnalogRF

Texas instruments

Analog / Mixed Signal Layout Design Engineer (as contractor from Sankalp)

Jul 2008 – Sep 2011 · 3 yrs 2 mos · Bengaluru Area, India and Dallas, Texas, USA

  • Worked on layout modules like audio codecs, headset drivers, PLL, satellite application chips, ADCs and DACs IO std cells etc..
  • Worked on automation projects like Matching compliance, Parasitic compliance (report generated in HTML),
  • DOTLIB and PORT mismatch verification tool, GUI for internal Verification Tool using SKILL and PERL.
AnalogRF

Advanced micro devices

Layout Designer (as contractor from sankalp)

Oct 2007 – Jun 2008 · 8 mos · Bangalore

  • Worked on memory and memory controller layouts
  • Worked on DRC regression for 22nm process
  • Worked on automation for Pin Plot and Power Plot using SKILL
  • Worked on TEST CASE generation script for DRC regression using SKILL.

Sankalp semiconductor pvt ltd

Analog / Mixed Signal Layout Design Engineer

Jul 2007 – Sep 2011 · 4 yrs 2 mos · Hubli

  • Worked on layout modules for Clients like TI, AMD, PMC (details shared seperately in respective client lists)
  • Developed GUI for internal reference based Layout generation and porting tool called SALL
  • Took part in training process as presenter, trainer and document creation for SKILL Training and Analog Layout Concept Training
  • Took part in hiring process as interviewer and invigilator.
  • Took initiative in various event management especially Sports event organising.
AnalogRF

Education

Manipal University

Master of Science (M.S.) — Microelectronics

Jan 2007 – Jan 2014

NTTF

Diploma — Electronics

Jan 2004 – Jan 2007

MPESs SDM Arts, Science, Commerce & B.B.A. College, Honnavar. (U.K.)

High School — Electrical and Electronics Engineering

Jan 2002 – Jan 2004

New English School, Honnavar

High School

Jan 1996 – Jan 2002

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