Krishna Teja

DevOps Engineer

Bengaluru, Karnataka, India5 yrs experience

Key Highlights

  • 4+ years of experience in PnR and STA
  • Expertise in lower nodes (3nm and 5nm)
  • Strong collaboration with PnR and DFT teams
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Static Timing Analysis.

Contact

Skills

Core Skills

Static Timing AnalysisPlace & Route

Other Skills

TCLCommunicationPhysical DesignLinuxHardware DesignPlace and routeFloorplanning

About

Having 4+ years of experience in PnR & STA .Worked in ACL digital, INTEL ,AMD & Samsung. Worked in lower nodes (3nm and 5nm). Good exposure in PnR , STA Flow and Timing analysis.

Experience

5 yrs
Total Experience
2 yrs 10 mos
Average Tenure
8 mos
Current Experience

Samsung india

Contract STA Engineer

Oct 2025Present · 8 mos · Bengaluru · On-site

  • As a STA Engineer, I am responsible to analyze the timing from early RTL Phase to till signoff. For Each and Every RTL delivery , I ran the STA flow then Check & analyze the timing reports and discussed with PnR and DFT Teams on violations and bought the design with timing clean.
Static Timing AnalysisTCL

Amd

Contract Timing Engineer

May 2024Oct 2025 · 1 yr 5 mos · Bengaluru · On-site

  • Working with STA Team.Working on Timing constraints and Timing issues like UCRs, Interpreting timing reports and analyze issues in various stages of design and providing feedback to PnR team.
CommunicationStatic Timing Analysis

Intel corporation

Contract physical design engineer

Feb 2022Apr 2024 · 2 yrs 2 mos · Bengaluru, Karnataka, India · On-site

  • Working With PD team.Handle 5nm block in P&R, STA and generate Caliber reports.
Place & RouteCommunication

Acl digital

STA Engineer

Jun 2021Present · 5 yrs · Bangalore Urban · On-site

Education

Sri Venkateswara College of engineering and technology chittoor

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jun 2015Apr 2019

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