Kausthubh Srinivasan

Software Engineer

Udupi, Karnataka, India2 yrs 5 mos experience

Highly Stable

Key Highlights

Expert in RTL Design and Front-End Flow methodologies.
Proficient in Low Power design techniques and automation.
Strong foundation in VLSI Design with a Master's degree.

Stackforce AI infers this person is a VLSI Design Engineer with expertise in semiconductor design and verification.

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Skills

Core Skills

Rtl DesignFront-end Flow

Other Skills

Front-End SoC Integration FlowLow PowerPower IntentUnified Power Format (UPF)VCSStatic Timing AnalysisLogic SynthesisDigital Circuit DesignLow-power DesignDigital IC DesignUPFShell ScriptingPython ScriptingVerilogC

About

Passionate VLSI Design Engineer seeking to apply the acquired training and skills to help realize the goals of the organization and in the process build a career which is challenging and rewarding.

Experience

2 yrs 5 mos

Total Experience

2 yrs 5 mos

Average Tenure

2 yrs 5 mos

Current Experience

Microchip technology inc.

Engineer II

Jan 2024 – Present · 2 yrs 5 mos · Bengaluru, Karnataka, India · On-site

Intel corporation

Graduate Intern Technical

Aug 2022 – Jul 2023 · 11 mos · Bengaluru, Karnataka, India

 Front-End Flow and Methodology:
Set up repository for RTL Design of Sub-System.
Enable the Front-End SoC Integration Flow.
Enable the Front-End Sign-off Flows such as Lint, Clock Domain Crossing (CDC), Low Power, Intellectual Property (IP) Quality Check.
Develop scripts to package the Front-End Sign-off Flows for Sub-System, independent of the methodology.
Automate the Front-End Sign-off Flows and VCS for Sub-System.
 Describe and Verify Power Intent using Unified Power Format (UPF) and VC respectively of partition.

RTL DesignFront-End SoC Integration FlowLow PowerPower IntentUnified Power Format (UPF)VCS+1