Aviral Shrivastava

Product Engineer

Bengaluru, Karnataka, India10 mos experience

Key Highlights

  • Expertise in digital design and static timing analysis.
  • Proficient in multiple EDA tools and methodologies.
  • Strong foundation in embedded systems and digital electronics.
Stackforce AI infers this person is a Digital Design Engineer with a focus on semiconductor engineering and embedded systems.

Contact

LinkedIn

Skills

Core Skills

Digital DesignStatic Timing AnalysisSynthesis

Other Skills

C++LinuxDigital ElectronicsSystemVerilogRTL CodingUniversal Verification Methodology (UVM)Conformal LEC SolutionsGenus Synthesis SolutionTclTempus Timing Signoff SolutionSynopsys Spyglass LintQuestaSimSynopsys Design CompilerIntel Quartus PrimeXilinx ISE

Experience

10 mos
Total Experience
10 mos
Average Tenure
10 mos
Current Experience

Analog devices

2 roles

Digital Design Engineer

Promoted

Aug 2025 – Present · 10 mos · Bengaluru, Karnataka, India · On-site

C++LinuxStatic Timing AnalysisDigital ElectronicsSystemVerilogRTL Coding+2

Synthesis and STA Engineer

Nov 2024 – Jul 2025 · 8 mos · Bengaluru, Karnataka, India · On-site

Conformal LEC SolutionsGenus Synthesis SolutionSynthesisStatic Timing Analysis

Birla institute of technology and science, pilani

Teaching Assistant

Sep 2022 – May 2024 · 1 yr 8 mos · Pilani, Rajasthan, India · On-site

Education

Birla Institute of Technology and Science, Pilani

Master of Engineering - MEng — Embedded Systems

Sep 2022 – May 2024

Government Engineering College Raipur

Bachelor of Technology - BTech — Electronics and Telecommunications Engineering

Jan 2017 – Jan 2021

Stackforce found 100+ more professionals with Digital Design & Static Timing Analysis

Explore similar profiles based on matching skills and experience

Dhanashree K

Dhanashree K

Manager -Talent Acquisition

at Mirafra Technologies

Bengaluru, India13 yrs 4 mos exp
VLSIASIC
R.

RudreshaN ...

RAN Physical layer Manager

at Mavenir

Bengaluru, India20 yrs 2 mos exp
LTE Physical layerSignal Processing
PRANAV KARTIKEYA

PRANAV KARTIKEYA

Summer Research Intern

at NIT Trichy

Visakhapatnam, India0 mo exp
Embedded SystemsVLSI Design
Nandakishor Prasanth

Nandakishor Prasanth

UI UX Designer

at Google Developer Student Clubs, NIT Calicut

Trivandrum, India1 yr 10 mos exp
Amey Kulkarni

Amey Kulkarni

Senior Lead Engineer

at Qualcomm

Bangalore, India7 yrs 3 mos exp
System on a Chip (SoC)Debugging
RR

Rajendra Ranmale

Design Engineer, Senior Principal

at Broadcom

Bengaluru, India24 yrs 11 mos exp
VLSIMachine LearningSoCIntegrated Circuit DesignRTL design
Anuradha D.

Anuradha D.

Senior Human Resources Manager

at Applied AI Consulting (AAIC)

India8 yrs 4 mos exp
HR ManagementStrategic HiringHuman Resources (HR)Hiring
Melvin Balakrishnan

Melvin Balakrishnan

Senior ASIC Engineer

at NVIDIA

Bengaluru, India6 yrs 10 mos exp
Application-Specific Integrated Circuits (ASIC)RTL Design