Devanarayanan S — Software Engineer
I am a Senior LTE/NR L2 MAC Engineer specializing in scheduler architecture, system-level KPI optimization, and mission-critical feature delivery within gNodeB/eNodeB environments. My core expertise lies in MAC scheduler algorithms and resource allocation strategies across LTE and NR systems. I have strong domain depth in CAT-M handling, Dynamic Spectrum Sharing (DSS – symmetric and asymmetric), Baseband Pooling (BB Pooling), Power Pooling design, and HARQ optimization. Recently contributed to Mission Critical Public Safety QoS feature delivery, achieving ~40% improvement in RTT and Jitter for a live customer deployment. This involved cross-functional task-force collaboration and deep system-level trade-off analysis across PHY, RLC, integration, and scheduler components. I bring extensive hands-on experience resolving both customer and lab-level issues, with strong capability in cross-layer debugging, KPI impact assessment (RTT, Jitter, BLER, Throughput, Latency), and legacy feature impact analysis. In parallel, I actively integrate Agentic AI into telecom engineering workflows. By introducing a Sub-Agent AI debugging architecture and AI-assisted feature modeling approaches, I have enabled: • 30–40% reduction in debugging turnaround time • ~20% improvement in feature development cycles • ~50% personal productivity acceleration I also contribute to 6G MRSS scheduler development within SLS simulation environments, supporting spectrum sharing research and future RAN architecture explorations. Passionate about building intelligent, AI-augmented telecom systems that combine deep protocol expertise with next-generation automation.
Stackforce AI infers this person is a Telecommunications Engineer specializing in MAC layer and AI-augmented development.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 3 mos
Skills
- Mac Scheduler Algorithms
- Resource Allocation Strategies
- Ai-assisted Feature Modeling
- Scheduler Algorithms
- L2/l3 Layer Development
- Web/app Development
Career Highlights
- Achieved 40% improvement in RTT and Jitter.
- Introduced AI architecture reducing debugging time by 30-40%.
- Contributed to 6G scheduler development for future RAN.
Work Experience
Nokia
Software Engineer (4 yrs 10 mos)
Capgemini Engineering
Software Engineer (2 yrs 5 mos)
Dvivert Solutions
Intern (1 yr 1 mo)
Education
BE - Bachelor of Engineering at Anna University Chennai