Vikas Makhija — CTO
Experienced Senior Research And Development Engineering Manager with a demonstrated history of working in the VLSI/EDA industry. Skilled in Functional Verification, Verilog, Working on latest Industry standards like DDR5, LPDDR5 , HBM3 and Expertise in Protocols like DDR, LPDDR, HBM, AXI, Silicon Validation, and RTL Coding. Strong engineering professional with M.tech from Indian Institute of Science .
Stackforce AI infers this person is a VLSI/EDA expert with strong leadership in memory protocol verification.
Location: Noida, Uttar Pradesh, India
Experience: 19 yrs 11 mos
Skills
- Functional Verification
- Memory Protocols
Career Highlights
- Expert in multi-die verification and memory protocols.
- Led a team of over 20 engineers in product development.
- Strong background in VLSI/EDA with advanced protocol expertise.
Work Experience
Synopsys Inc
Sr. R&D Director (2 yrs 2 mos)
Sr R&D Manager (3 yrs 10 mos)
Synopsys India Pvt Ltd
R&D Manager -II (3 yrs)
R&D Manager (4 yrs 5 mos)
Synopsys
Sr R & D Engineer (6 yrs 10 mos)
Qualcomm Inc (Payroll of Mindlance India Pvt Ltd) Delhi
Engineer-III (1 yr 5 mos)
Freescale Semiconductors India Pvt Ltd
Senior Design Engineer (5 yrs 8 mos)
Senior Design Engineer (5 yrs 8 mos)
Education
M.tech at Indian Institute of Science (IISc)
Bachelor of Technology (B.Tech.) at YMCA Faridabad