Shandeep Arya

Software Engineer

Bengaluru, Karnataka, India7 yrs 9 mos experience

Key Highlights

Experienced in Design Verification and UVM methodologies.
Strong background in RTL Design and Functional Verification.
Leadership experience in verification engineering roles.

Stackforce AI infers this person is a Verification Engineer specializing in semiconductor design and verification.

Contact

Skills

Core Skills

Design Verification EngineerUniversal Verification Methodology (uvm)

Other Skills

VCSPower AwareGate Level SimulationGLSSystem on a Chip (SoC)VerilogRTL DesignSystem verilogFormal VerificationAssertionsDebuggingFunctional VerificationLow power verificationUPFLeadership

Experience

7 yrs 9 mos

Total Experience

Average Tenure

Current Experience

Mirafra technologies

Senior Verification Engineer

Aug 2022 – Present · 3 yrs 10 mos · Bengaluru, Karnataka, India

VCSPower AwareGate Level SimulationGLSSystem on a Chip (SoC)Verilog+11

Verifworks pvt ltd

Verification Engineer

Feb 2019 – Jul 2022 · 3 yrs 5 mos · Bengaluru, Karnataka, India

Cvc pvt ltd

Design Verification Trainee Engineer

Jul 2018 – Jan 2019 · 6 mos · Bengaluru, Karnataka, India

Education

R.M.K Engineering College

Bachelor's degree — Electronics and Communications Engineering

Jan 2014 – Jan 2018

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