KARTHIK K. — Product Engineer
Engineer with focus on IP Verification and VIP development. - ASIC Verification. - Development of AXI VIP from scratch. - Development of APB from scratch. - Test plan / Test case /Test bench development at block level. - Hardware Description Languages : Verilog and SystemVerilog. - Good command in writing System Verilog Assertions. - Strong knowledge on Functional Coverage. - Programming Languages : C - Scripting : Python - Methodology Expertise : Universal Verification Methodology (UVM). - Good debugging skills. - Simulation Tools : QuestaSim, VCS, NCSIM - Operating System : Linux, Windows. Protocols Having Hands on Experience. - AMBA AXI - AMBA APB
Stackforce AI infers this person is a Verification Engineer specializing in ASIC design and verification methodologies.
Experience: 1 yr 1 mo
Career Highlights
- Expert in ASIC Verification and VIP development.
- Proficient in SystemVerilog and UVM methodologies.
- Hands-on experience with AMBA protocols.
Work Experience
Università degli Studi di Siena
Research Fellowship (1 yr 2 mos)
Education
Master's degree at Università di Siena