Son Nguyen Duy

Product Engineer

Vietnam9 yrs 5 mos experience

Highly Stable

Key Highlights

Expert in analog layout design for semiconductor applications.
Proven track record in designing complex PMIC layouts.
Specialized in SRAM and standard cell library layouts.

Stackforce AI infers this person is a Semiconductor Layout Engineer with expertise in analog and memory design.

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Skills

Core Skills

Analog Layout DesignPower Management Ic DesignMemory Layout DesignStandard Cell Design

Other Skills

Layout for UCIE PHYLayout DesignAnalog DesignLayout for PMICTapeout GDSPDK modificationBuck Converter DesignBoost Converter DesignCharger DesignLDO DesignLayout for SRAM librariesSingle Port DesignRedundancy ImplementationLayout for standard cell library

Experience

9 yrs 5 mos

Total Experience

3 yrs 1 mo

Average Tenure

Current Experience

Synopsys inc

AMS Layout Staff

Jul 2023 – Mar 2025 · 1 yr 8 mos

Layout for UCIE PHY

Layout for UCIE PHYAnalog Layout Design

Eta solutions

Senior analog layout engineer

Jun 2019 – Jun 2023 · 4 yrs

Layout for PMIC : Buck, Boost, Charger, LDO ( high PSRR , high voltage) and experience in fully tapeout GDS for them.
Modify/update for the PDKs and command rule to match with new process and new devices

Layout for PMICTapeout GDSPDK modificationPower Management IC Design

Dolphin technology

2 roles

Senior memory layout engineer

Promoted

Jun 2016 – May 2019 · 2 yrs 11 mos

Layout for SRAM libraries :
Single Port, Single Port with column redundancy, Single Port with row and column redundancy, Pseudo Two Port Register File, Power Option( Low Leakage)

Layout for SRAM librariesMemory Layout Design