DINESH WANI

Software Engineer

Chandrapur, Maharashtra, India8 yrs 6 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expertise in VLSI and FPGA design.
  • Proficient in Verilog and Matlab.
  • Strong background in static timing analysis.
Stackforce AI infers this person is a VLSI and FPGA specialist with strong technical skills in electronics design.

Contact

LinkedIn

Skills

Core Skills

VlsiFpga

Other Skills

VerilogMatlabCElectronicsCadence EncounterCadence VirtuosoXilinx ISEScriptingStatic Timing AnalysisMicrosoft OfficeMicrosoft ExcelMicrosoft WordLayout DesignBasic HTML

Experience

8 yrs 6 mos
Total Experience
2 yrs 10 mos
Average Tenure
6 yrs 9 mos
Current Experience

Synopsys inc

2 roles

Staff Engineer

Jan 2024 – Present · 2 yrs 5 mos · Hyderabad, Telangana, India · On-site

VerilogMatlabCElectronicsCadence EncounterCadence Virtuoso+5

Senior 1

Sep 2019 – Feb 2024 · 4 yrs 5 mos · Hyderabad, Telangana, India · On-site

Arm

Consultant

Apr 2018 – Aug 2019 · 1 yr 4 mos · Bengaluru, Karnataka, India

Microsemi corporation

Intern

Feb 2017 – Jul 2017 · 5 mos · Hyderabad Area, India

Education

Vellore Institute of Technology

Master of Technology (M.Tech.) — VLSI

Jan 2015 – Jan 2017

Jawaharlal nehru college of enginnering aurangabad

Bachelor of Engineering (B.E.) — ELECTRONICS AND TELECOMMUNICATION

Jan 2010 – Jan 2014

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