Amankumar Purohit

Software Engineer

Bengaluru, Karnataka, India2 yrs 10 mos experience

Most Likely To Switch

Key Highlights

Passionate about VLSI and digital design.
Experience in low power design techniques.
Developed FPGA solutions for quantum applications.

Stackforce AI infers this person is a VLSI design engineer with a focus on digital design and quantum computing applications.

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Skills

Core Skills

VerilogRtl DesignDigital Ic Design

Other Skills

VCSzFmCheckRegression AnalysisDebuggingVerdiZeBuSynplify ProSystemVerilogField-Programmable Gate Arrays (FPGA)Xilinx VivadoLow power designUnified Power Format (UPF)MicroarchitectureDUICLinux

About

Hey there! I'm Aman, a passionate RTL design enthusiast with a deep-rooted love for digital design. My journey into the fascinating realm of VLSI began as an intern at Intel, where I got my first taste of the intricate dance between hardware and software that powers our digital world. My career goals are deeply rooted in my passion for VLSI. As a fresher in this dynamic field, I aspire to continue learning, growing, and making meaningful contributions to the next wave of technological advancements. I'm driven by the desire to collaborate with like-minded professionals, exchange ideas, and collectively push the boundaries of what's possible in VLSI design.

Experience

2 yrs 10 mos

Total Experience

1 yr 5 mos

Average Tenure

2 yrs 1 mo

Current Experience

Synopsys inc

Applications Engineering, Sr Engineer

May 2024 – Present · 2 yrs 1 mo · Bengaluru, Karnataka, India

VerilogVCS

Qdit labs

Engineer

Aug 2023 – May 2024 · 9 mos · Bengaluru, Karnataka, India

Understanding the use of FPGA in Quantum Key Distribution, Quantum Random Number
Generator. Developed LFSR based extractor module which used in post processing part of QRNG’s.

VerilogRTL Design

Intel corporation

Graduate Intern

Aug 2022 – Jul 2023 · 11 mos · Bengaluru, Karnataka, India

Implemented the low power techniques using UPF at subsystem level. Knowledge of static
checks on UPF. Good knowledge of different power management techniques, power management cells,
power domains, power state tables. Designing and developing RTL code for Round Robin Arbiter based
on micro-architecture and at behavioral level, Asynchronous FIFO, Synchronous FIFO.

Digital IC DesignRTL Design