SANDEEP GAUR — Software Engineer
I have 8+ years of Experience in VLSI Industry as an IP Verification Engineer. Good in Hardware Description Languages like Verilog , System Verilog. I have a good knowledge in verifying the IP using UVM based Methodology. Currently working in PCIe protocol. Worked in CXL protocol. I have a Protocol knowledge in PCIE Technology which is used as an Interconnect between Devices. Bus Protocol like APB and AXI .
Stackforce AI infers this person is a VLSI Verification Engineer with expertise in hardware protocols.
Location: Coimbatore, Tamil Nadu, India
Experience: 8 yrs 11 mos
Skills
- Ip Verification
- Functional Verification
Career Highlights
- 8+ years in VLSI as IP Verification Engineer
- Expert in UVM-based verification methodologies
- Strong knowledge of PCIe and CXL protocols
Work Experience
Qualcomm
Senior Lead Engineer (7 mos)
Senior Engineer (4 yrs 4 mos)
Mobiveil Inc.
Senior IP Verification Engineer (4 yrs)
Education
Bachelor of Engineering (BE) at KSR INSTITUTE FOR ENGINEERING AND TECHNOLOGY, NAMAKKAL