Vardhana M — Software Engineer
Experienced Design and Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verification and Validation (V&V), SV, Scripting, Universal Verification Methodology (UVM), and Visual Basic for Applications (VBA). Strong engineering professional with a Master's degree focused in Electrical, Electronics and Communications Engineering from N M A M Institute of Technology, NITTE.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in V&V and UVM.
Location: Bengaluru, Karnataka, India
Experience: 10 yrs 6 mos
Skills
- Verification And Validation (v&v)
- Universal Verification Methodology (uvm)
Career Highlights
- Expert in Verification and Validation methodologies.
- Proven experience in Machine Learning applications for design verification.
- Strong background in FPGA and UVM development.
Work Experience
Qualcomm
Staff Engineer (7 mos)
Senior Lead Verification Engineer (1 yr 11 mos)
Senior Verification Engineer (2 yrs)
NXP Semiconductors
Design Verification Engineer (3 yrs 5 mos)
Student Intern (1 yr 1 mo)
Techprosoft
Design Engineer (Part Time) (2 yrs)
Freelance
Freelance Engineer (2 yrs 7 mos)
Education
Master's degree at N M A M Institute of Technology, NITTE
Bachelor of Engineering - BE at Technology Consultants
