Swathi B — Software Engineer

A highly motivated engineer with good problem solving skills looking forward to work in a corporate with a professional work driven learning environment where I can apply my knowledge and skills to find technological solutions. Working as a senior RTL design engineer in compute subsystem at Qualcomm. As a part of my work at Qualcomm, I have been involved in clock controller and FUSA automotive safety feature addition to the design blocks. I am an efficient team player and have successfully executed multiple RTL releases through seamless collaboration with verification, synthesis, and SoC teams. Contributed to scripting initiatives for automating RTL design processes, enhancing efficiency, and ensuring rigorous adherence to design standards. A few of my skills and areas of expertise include: • Verilog • SystemVerilog • Lint, cdc, power intent • IP integration including clocking and power aspects • Perl and python scripting • Basic understanding and experience on working with CNNs, LSTM and other ML algorithms I am a VLSI enthusiast looking forward for opportunities to learn new things and contribute to design changes. Eager to keep up with the fast-moving technology, I do spend time regularly in upskilling and writing learning posts on LinkedIn. Few of my projects include: • RISC processor design using Verilog • Human Activity recognition using LSTM simulated on FPGA • High speed power efficient voltage level shifter design • I have worked on different stages of ASIC flow using tools like Cadence virtuoso, spyglass, Genus, modelsim. I believe in understanding the system level detail including software use cases for every design aspect. Apart from RTL design I have good understanding on ARM microcontroller architecture and have done many embedded system projects on STM microcontrollers interfacing I2S,I2C, Bluetooth, UART, sensors, motors and other peripherals. Also through my curriculum at MTech I have done projects on Linux Device drivers and RTOS scheduling algorithms. With my embedded system understanding, I would like to create optimized design with a holistic system level perspective. I have good understanding of AI/ML models especially CNNs and LSTMs. Have worked on MATLAB simulations, embedded projects as well as RTL projects for FPGA simulations for smart applications using ML algorithms. Looking forward to apply the ML knowledge to automate VLSI design flows. Other than academics I am an avid painter and enthusiastic trekker, always eager to learn new skills and embrace diverse experiences.

Stackforce AI infers this person is a VLSI design engineer with expertise in RTL design and machine learning applications.

Location: Bengaluru, Karnataka, India

Experience: 6 yrs 5 mos