D

Dinesh Kumar G V N

Software Engineer

Bengaluru, Karnataka, India6 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Unified Power Format and UVM methodologies.
  • Experience in low power verification for DDR subsystems.
  • Strong educational background from IIT Bombay.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in low power design methodologies.

Contact

Skills

Core Skills

Unified Power Format (upf)Universal Verification Methodology (uvm)

Other Skills

SystemVerilogField-Programmable Gate Arrays (FPGA)VerilogVHDL

Experience

6 yrs 11 mos
Total Experience
3 yrs 5 mos
Average Tenure
3 yrs 11 mos
Current Experience

Qualcomm

2 roles

Senior Verification Engineer

Promoted

Nov 2024Present · 1 yr 7 mos · Bengaluru, Karnataka, India

Unified Power Format (UPF)Universal Verification Methodology (UVM)

Hardware Engineer

Jul 2022Nov 2024 · 2 yrs 4 mos · Bengaluru, Karnataka, India

  • Low Power Verification Engineer working in DDR subsystem team
Unified Power Format (UPF)Universal Verification Methodology (UVM)

Indian institute of technology, bombay

Institute Research Assistant

Jul 2019Jul 2022 · 3 yrs · Mumbai, Maharashtra, India

Drdo, centre for airborne systems

Junior Research fellow

Feb 2018May 2019 · 1 yr 3 mos · Bengaluru, Karnataka, India

Education

Indian Institute of Technology, Bombay

Master of Technology - MTech — Integrated circuits and systems

Jan 2019Jan 2022

Vel Tech Technical University

Bachelor of Technology - BTech — electronics and communication

Jan 2013Jan 2017

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