Nitin Sharma

Software Engineer

Bengaluru, Karnataka, India6 yrs 3 mos experience

Key Highlights

  • Expert in SystemVerilog and Functional Verification.
  • Experience in Verification IP development for Memory sub-systems.
  • Strong background in Hardware Architecture and Digital Electronics.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in SystemVerilog and Functional Verification.

Contact

LinkedIn

Skills

Core Skills

SystemverilogFunctional Verification

Other Skills

DDRAXIVerilogC++Hardware ArchitectureDigital ElectronicsShell ScriptingScriptingSystem on a Chip (SoC)C (Programming Language)PerlUniversal Verification Methodology (UVM)

Experience

6 yrs 3 mos
Total Experience
2 yrs 6 mos
Average Tenure
1 yr 3 mos
Current Experience

Qualcomm

Senior Engineer

Mar 2025 – Present · 1 yr 3 mos · Bangalore

DDRAXISystemVerilogVerilogC++Hardware Architecture+8

Cadence design systems

Software Engineer II

Dec 2022 – Mar 2025 · 2 yrs 3 mos

  • Verification IP development for Memory sub-systems

Einfochips (an arrow company)

2 roles

Design Verification Engineer

Oct 2020 – Nov 2022 · 2 yrs 1 mo

Project Trainee

Jan 2020 – Sep 2020 · 8 mos

Education

Nirma University

Bachelor of Technology — Electronics and Communications Engineering

Jan 2016 – Jan 2020

Stackforce found 100+ more professionals with Systemverilog & Functional Verification

Explore similar profiles based on matching skills and experience

Ravindu Nimsara Perera

Ravindu Nimsara Perera

Senior Research And Development Engineer

at Syntax Genie (Pvt) Ltd

Colombo, Sri Lanka5 yrs 1 mo exp
Synopsys tools
Rajendra Prasad

Rajendra Prasad

R&D Engineering Director

at Synopsys Inc

Mountain View, United States27 yrs 2 mos exp
ManagementMachine LearningLeadershipCustomer EngagementPeople Management
Ajitesh Mishra

Ajitesh Mishra

Senior Engineer

at Sandisk

Bengaluru, India7 yrs exp
Application-Specific Integrated Circuits (ASIC)Hardware EngineeringFunctional VerificationSAPDevOps
Srinath Jeevakumar

Srinath Jeevakumar

Senior Architect

at NVIDIA

Bengaluru, India6 yrs 8 mos exp
Performance VerificationSilicon Bring-upPerformance Analysis
Shripad Deshpande

Shripad Deshpande

Head of R&D - Hardware Design and EDA

at Chipforge.ai

India27 yrs 2 mos exp
EDASoCVirtual PrototypingASIPRTL design
Ashutosh Rao

Ashutosh Rao

R&D Engineer

at Synopsys Inc

Bengaluru, India4 yrs 4 mos exp
Static Timing AnalysisCircuit DesignHardware Security
DG

Dinesh Kumar G V N

Senior Verification Engineer

at Qualcomm

Bengaluru, India6 yrs 11 mos exp
Unified Power Format (UPF)Universal Verification Methodology (UVM)
Shivaprasad Boddupally

Shivaprasad Boddupally

Analog Design Engineer

at Sophrosyne Semiconductor

Nalgonda, India4 yrs 4 mos exp
Analog Integrated Circuit DesignElectronic Circuit DesignSilicon Validation