Jul 2022 – May 2023 · 10 mos

• Technical lead - DFT backend implementation and Timing

Oct 2020 – Jul 2022 · 1 yr 9 mos

• Scan implementation and its impact on Physical design, UPF and timing. Triage post-si pattern failures.

Apr 2020 – Oct 2020 · 6 mos

• Technical lead, responsible for methodology and development of DFT Implementation

Jun 2018 – Apr 2020 · 1 yr 10 mos

• DFT Manager responsible for E2E DFT flow development and support - RTL DRC, Scan Insertion, MBIST, ATPG and Netlist DRC.

Jun 2011 – May 2018 · 6 yrs 11 mos

• Technical Lead, responsible for methodology and development of flows on Synthesis, Scan Insertion, Corewrapper, Testpoints.

Sep 2010 – May 2011 · 8 mos

• Code Analysis & Run-time improvement. Graph based sub-circuit search. Data Extraction and Mining on the QOR. Logic Synthesis