Rahul Kulkarni

Director of Engineering

Hubli, Karnataka, India4 yrs 5 mos experience

Key Highlights

Proficient in cutting-edge technology nodes.
Designed multiple custom automation solutions.
Recognized for innovation and delivery excellence.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in analog layout and automation solutions.

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Skills

Core Skills

Analog LayoutDesign Automation

Other Skills

SKILL®PythonShell scriptingCadence VirtuosoCadence SKILLVery-Large-Scale Integration (VLSI)LeadershipDesign Rule Checking (DRC)Layout Versus Schematic (LVS)Layout DesignElectronicsCMOSTeamworkMicrosoft OfficeLinux

About

▣ 4.5 years of working experience at HCLTech (Sankalp Semiconductor) as part of the Intel Contingent Workforce. ▣ Proficient across cutting-edge technology nodes including Intel 3, Intel 18A, Intel 14A (RibbonFET), TSMC N3 & N2 (Current). ▣ Proficient in industry-standard tools: Cadence Virtuoso (L/XL/EXL/MXL), ICV VUE, Totem and Argon. ▣ Designed and delivered multiple custom automation solutions using SKILL®, Python and Shell scripting to streamline layout and verification workflows. ▣ Strong adaptability, quick learning curve, and consistent delivery under tight project schedules in high-performance analog design environments. ▣ Skilled at identifying layout and verification bottlenecks and building scalable solutions for faster, more reliable design delivery. ▣ Recognized with multiple awards for innovation, delivery excellence, and value creation across successive project quarters.

Experience

4 yrs 5 mos

Total Experience

Average Tenure

Current Experience

Sankalp semiconductor

3 roles

Technical Lead

Oct 2024 – Apr 2026 · 1 yr 6 mos

Senior Engineer

Promoted

Jul 2022 – Sep 2024 · 2 yrs 2 mos

Custom Layout and Design Automation Engineer

Sep 2021 – Jun 2022 · 9 mos

SKILL®PythonShell scriptingAnalog LayoutDesign Automation

Entuple technologies pvt. ltd.

Custom IC Design Internship

Feb 2021 – Apr 2021 · 2 mos

Online internship program on CUSTOM IC DESIGN: CMOS STANDARD CELL CIRCUIT DESIGN, SIMULATION AND LAYOUT.

Electronics & ict academy, indian institute of technology guwahati.

VLSI Circuit Design Internship

Aug 2020 – Oct 2020 · 2 mos

Internship Programme on VLSI Circuit Design under E&ICT Academy IIT Guwahati (Supported by Ministry of Electronics and Information Technology (MeitY), Govt. of India) and Semi-Conductor Labs, Chandigarh.