MOUNIKA DEVI MURALA — Software Engineer

-> 10 yrs of experience in Analog and Mixed Signal Layout Design -> Skills : IP level & Macro Layout Design Analog & Digital Layout Review Layout Quality Verification & IP Signoff Cross-Functional Collaboration CAD Automation & Process Improvement Technical Presentations & Knowledge Sharing Candidate Selection & Interview Process Participation Mentorship for Trainees & Interns ->Technologies nodes: TSMC 5nm, 7nm, SS3nm, SS4nm, SS5nm, SS7nm, SS10nm, SS14nm, TSMC 28nm, ihdk10nm, GF14nm, GF28nm, GF 45nm,TSMC130nm, 150nm, 180nm &Tower Jazz 350nm. ->Worked projects for companies Infineon Technologies IBM indian pvt limited Westran Digital( SanDisk Semiconductors) Samsung R&D Semiconductors Intel Technologies india pvt ltd Qualcomm - San Diego Team. ->Work experience & Knowledge on Projects : High speed serdes PLL, TX MACROS DDR PLL Designs Automotive PLL Designs Mixed signal IP Power Management IP DDRGEN6 ->Analog Layout & Mixed Signals IP skills: ->competent in scratch layouts of analog and digital blocks from schematic to layout. ->Solid understanding of Floor Planning, Placement and Routing, Physical verification and well versed in ECO implementations. ->Expertise in fixing Latch up, Density and Antenna checks EMIR, & reduce parasitic ->Good knowledge on FINFET Layout ->Operating System : LINUX, Windows. ->EDA Tools : Cadence - Virtuoso, Genesys, Genoa, LAP, Synopsys CC ->Verification Tools : Assura, PVS, Calibre, CPDS, Argon, Favor, Dart, & Totem

Stackforce AI infers this person is a skilled Analog Layout Engineer with extensive experience in semiconductor design.

Location: Singapore, Singapore

Experience: 5 yrs 10 mos