Siva Mandalapu

Software Engineer

Mundlamuru, Andhra Pradesh, India9 yrs 7 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in high-speed IO circuit design.
Proficient in analog and mixed signal circuit design.
Experienced in circuit verification and characterization.

Stackforce AI infers this person is a highly skilled circuit designer in the semiconductor industry.

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Skills

Core Skills

Circuit DesignVerificationAnalog And Mixed Signal DesignCircuit Characterization

Other Skills

circuit Macro characterizationHspiceSpectreNanotimeLiberate Amslevel shiftersSense amplifiersdecoder logic realization circuitsSchmitt triggerlatchesMux circuitsDAC for VREF generation circuitsSilicon smartcircuit reliability simulationsAging

Experience

9 yrs 7 mos

Total Experience

3 yrs 2 mos

Average Tenure

4 yrs 3 mos

Current Experience

Amd

2 roles

MTS Silicon Design Engineer

Jul 2023 – Present · 2 yrs 11 mos · Hyderabad, Telangana, India

Sr Silicon design Engineer

Mar 2022 – Jul 2023 · 1 yr 4 mos · Hyderabad, Telangana, India

Xilinx

sr1 circuit designer

Feb 2020 – Feb 2022 · 2 yrs · Greater Hyderabad Area

Responsible for circuit design and verification with spectre and hspice .
Responsible for circuit Macro characterization using nanotime and Liberate Ams tools

circuit designverificationcircuit Macro characterizationHspiceSpectreNanotime+1

Synopsys inc

2 roles

Sr1 Circuit designer

Dec 2019 – Feb 2020 · 2 mos · Greater Bengaluru Area

Circuit designer 2

Jul 2016 – Nov 2019 · 3 yrs 4 mos · Greater Bengaluru Area

Proficient in designing analog and mixed signal blocks level shifters, Sense amplifiers, decoder logic realization circuits, Schmitt trigger, latches, Mux circuits, DAC for VREF generation circuits and Responsible for full macro circuit design starting from Calculating porting factors to till design sign off.
Good expertise on circuit characterization tools nanotime and silicon smart

analog and mixed signal designlevel shiftersSense amplifiersdecoder logic realization circuitsSchmitt triggerlatches+5