Pranav Srinath — Software Engineer
Skilled in Verilog, Digital system and microarchitecture design. Expertise in IP microarchitecture RTL development. Working in IP design of complex multimedia IPs. Experienced in Area and power optimised design, timing, functional coverage closure. Good understanding of the ARM architecture. Strong operations professional with 3 years industrial experience and a Bachelor of Technology - BTech focused in Electrical, Electronics and Communications Engineering from National Institute of Technology Karnataka.
Stackforce AI infers this person is a VLSI design engineer with expertise in ASIC and RTL development.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 6 mos
Skills
- Rtl Development
- Application-specific Integrated Circuits (asic)
Career Highlights
- Expert in RTL development and microarchitecture design.
- Strong background in multimedia IP design and optimization.
- 3 years of experience with leading tech companies.
Work Experience
RTL Design Engineer (2 mos)
IBM
Senior Staff Engineer (1 yr 4 mos)
Samsung R&D Institute India
Lead Engineer (9 mos)
Senior Engineer (9 mos)
Qualcomm
Engineer (7 mos)
Associate Engineer (1 yr 6 mos)
Arm
Student Intern (5 mos)
Defence Research and Development Organisation (DRDO)
Summer Research Intern (1 mo)
Education
Bachelor of Technology - BTech at National Institute of Technology Karnataka
PUC at DCFL pu college
HIGH SCHOOL/SECONDARY DIPLOMAS AND CERTIFICATES at Jnanodaya School