Mayank Tantuway

CEO

Noida, Uttar Pradesh, India4 yrs 9 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in FPGA prototyping and verification.
Proven track record in 5G-NR system development.
Strong problem-solving skills in complex SoC designs.

Stackforce AI infers this person is a Telecommunications Engineer specializing in FPGA and SoC design.

Contact

Skills

Core Skills

Fpga PrototypingSystem On A Chip (soc)

Other Skills

Hardware EmulationProblem Solving5G-NR Low-PHY implementationMATLAB 5G ToolboxVerilogXilinx RFSoCWiresharkPythonLow-Power RTL DesignLinuxEDAApplication-Specific Integrated Circuits (ASIC)Integrated Circuits (IC)Xilinx RFSoC ZCU208ZCU670

About

FPGA prototyping and verification engineer with 4.5+ years of experience, currently working on Cadence Protium to design, develop, and verify deep runtime debugging capabilities for large-scale FPGA prototypes. My work directly improves system observability, debug turnaround, and bring-up efficiency for complex SoCs. A result-driven professional with a Bachelor's degree focused in Electronics and Communication Engineering from Indian Institute of Technology, Guwahati.

Experience

4 yrs 9 mos

Total Experience

2 yrs 4 mos

Average Tenure

3 yrs 5 mos

Current Experience

Cadence

3 roles

Lead Verification Engineer

Jan 2026 – Present · 5 mos · Noida, Uttar Pradesh, India · On-site

Senior Verification Engineer

Jan 2024 – Dec 2025 · 1 yr 11 mos · Noida, Uttar Pradesh, India · On-site

FPGA PrototypingHardware Emulation

Verification Engineer

Nov 2022 – Dec 2023 · 1 yr 1 mo · Noida, Uttar Pradesh, India · On-site

FPGA PrototypingHardware Emulation

Stl - sterlite technologies limited

Baseband Developer

Jul 2021 – Nov 2022 · 1 yr 4 mos · Gurugram, Haryana, India

End-to-End development of 5G-NR Downlink Chain - FPGA and MATLAB
Working on 5G-NR Low-PHY implementation on Xilinx RFSoC for O-RAN split 7.2 Radio
Designed MATLAB models using 5G-Toolbox for testing and debugging PDSCH,PUSCH,PRACH
Designed a UE-Emulator using MATLAB 5G Toolbox to check Constellations, EVM, CRC of board output
Experience in Verilog implementation and FPGA validation of OFDM signal generation, channel filter and CFR
Understanding of 5G-NR Physical layer and experience in RTL Design using Verilog
Hands-on experience with Xilinx signal processing IPs and RF data converters (DAC/ADC)
Experience in RF Front-End design and debugging using ILA and Xilinx RF-Analyzer
Developed a Wireshark PCAP analysis and test-vector generation tool using Python

Problem SolvingSystem on a Chip (SoC)