Nalla Bhanuvardhan Reddy — Software Engineer

I am a Design Verification Engineer with 3 years of experience in digital electronics and a sounding Knowledge in Verilog, System Verilog, and UVM. My expertise lies in building reusable System Verilog-based test benches, developing UVM-based verification components, and writing coverage and assertions. I have a good understanding of RTL design and verification using System Verilog, as well as IP-level understanding of test bench and verification environments using UVM. I am skilled in using standard protocols such as APB and AHB. Additionally, I have experience working with simulation tools like Synopsys VCS and VERDI.

Stackforce AI infers this person is a Design Verification Engineer specializing in digital electronics and verification methodologies.

Location: Hyderabad, Telangana, India

Experience: 5 yrs 11 mos