Madhav Pujari — Software Engineer

Senior Hardware-Assisted Verification Engineer at Synopsys with specialized experience in ZeBu emulation, transactors, memory models, and system bring-up across ZS4, ZS5, EP1, and EP2 platforms. I work on developing, integrating, and debugging high-performance vertical solution transactors and memory models used in SoC emulation flows. I have contributed to multiple ZeBu release cycles (ZS2024.03, ZS2025.06, ZeBu2024.03, ZeBu2025.06) and supported customer bring-up, feature validation, and large-scale regression debug across diverse SoC designs I focus on building scalable emulation solutions, improving debug efficiency, and applying AI/ML to modernize and accelerate hardware-assisted verification workflows

Stackforce AI infers this person is a Hardware Verification Engineer specializing in SoC emulation and AI-driven verification solutions.

Location: Hyderabad, Telangana, India

Experience: 3 yrs