Anjana B L

CEO

Bengaluru, Karnataka, India15 yrs 4 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in RTL design with VHDL and Verilog.
  • Certified in ISO 26262 Automotive safety.
  • Experience in high-speed Ethernet MAC IP core development.
Stackforce AI infers this person is a Telecommunications and Automotive safety expert with a focus on RTL design and high-speed protocols.

Contact

LinkedIn

Skills

Core Skills

Rtl DesignEthernet

Other Skills

VHDLVerilogMAC IP core developmentFPGACFunctional VerificationModelSimMicrocontrollersMatlabC++Embedded SystemsLinuxJavaShell ScriptingUnix

About

RTL Design(VHDL/Verilog). Certified in ISO 26262 Automotive safety. Have knowledge in various protocols such as 1G/10G/40G Ethernet ,PCI-Express,AXI, ACE Worked on 1Gbps and 10Gbps and 40Gbps Ethernet MAC IP core development. Experienced in designing AES based cryptographic module with security level-2 as per FIPS standard

Experience

15 yrs 4 mos
Total Experience
5 yrs 1 mo
Average Tenure
7 yrs 11 mos
Current Experience

Synopsys inc

2 roles

R&D Manager

Promoted

Aug 2022 – Present · 3 yrs 10 mos

ASIC Design Engineer

Jul 2018 – Present · 7 yrs 11 mos

Cdac

Project Engineer II

Aug 2011 – Jan 2018 · 6 yrs 5 mos · Bengaluru Area, India

  • RTL design using VHDL and Verilog.
  • Worked on 1Gbps,10Gbps Ethernet MAC IP core development.
VHDLVerilogRTL DesignEthernetMAC IP core development

Cdac - thiruvananthapuram

M.tech intern

May 2009 – May 2010 · 1 yr · Thiruvananthapuram Area, India

  • RTL design

Education

ER&DC IT

Master's degree — VLSI and Embedded Systems

Jan 2007 – Jan 2009

College of Engineering Kallooppara

Bachelor’s Degree — Electronics and communication

Jan 2002 – Jan 2006

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