A

Arevik Yepremyan

Software Engineer

Yerevan, Yerevan, Armenia4 yrs 2 mos experience

Key Highlights

  • Experienced in ASIC design and physical design methodologies.
  • Proficient in Python and VLSI design tools.
  • Strong background in Static Timing Analysis and Place & Route.
Stackforce AI infers this person is a VLSI design engineer with expertise in ASIC development.

Contact

LinkedIn

Skills

Core Skills

Static Timing AnalysisPlace & RoutePython (programming Language)

Other Skills

TCLC++VLSIPNRElectronics Hardware DesignAdobe PhotoshopAdobe Illustrator

Experience

4 yrs 2 mos
Total Experience
--
Average Tenure
--
Current Experience

Cisco

ASIC Engineer

Jun 2026 – Present · 0 mo · Armenia

Static Timing AnalysisPlace & RouteTCLPython (Programming Language)C++VLSI+2

Synopsys inc

3 roles

Senior Engineer

Dec 2024 – May 2026 · 1 yr 5 mos

Python (Programming Language)PNR

ASIC Physical Design Engineer I

Aug 2022 – Dec 2024 · 2 yrs 4 mos

Python (Programming Language)Place & Route

Intern PnR Engineer

Mar 2022 – Aug 2022 · 5 mos

Python (Programming Language)Place & Route

Education

European University of Armenia

Master's degree

Sep 2022 – May 2024

European University of Armenia

Bachelor of Microelectronics

Sep 2018 – May 2022

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