Ayush Pathak — Software Engineer
An enthusiastic spirit with highly motivated and leadership skills. Professionally trained Design Verification Engineer. • High level understanding and knowledge in Verilog, SystemVerilog, SystemVerilog Assertion, Electronics Circuit Design, Digital Electronics, Analog Electronics, Universal Verification Methodology (UVM), DFT. • Hands on experience in developing test bench components. • Strong quality assurance professional with a Bachelor of Technology - BTech focused in Electronics and Communications Engineering from ABES Engineering College.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in design and verification methodologies.
Location: Bengaluru, Karnataka, India
Experience: 4 yrs 8 mos
Skills
- System On A Chip (soc)
- Verification
- Ddr4
- Power Management
- Ai Workloads
- Design Verification
- Programming
Career Highlights
- Expert in Design Verification with hands-on experience.
- Proficient in System on a Chip (SoC) and verification methodologies.
- Strong background in digital and analog electronics.
Work Experience
HCLTech
Lead Engineer (8 mos)
Qualcomm
Verification Engineer 2 (7 mos)
Incise Infotech Private Limited
Verification Engineer (1 yr 5 mos)
NXP Semiconductors
Verification Engineer (11 mos)
Synopsys Inc
Graduate Engineering Trainee (1 yr 5 mos)
Maven Silicon
Trainee at Maven Silicon, Bangalore (7 mos)
Truechip Solutions
Electronic Engineer (1 yr 1 mo)
Education
Bachelor of Technology - BTech at ABES Engineering College
Intermediate at Sobtis Public School Senior Secondary
High School at Radha Madhav Public School