Kamala Vennela Vasireddy — Software Engineer
I am a recent graduate from Master of Science in Electrical Engineering at Columbia University with a focus on advanced concepts in computer architecture and formal hardware verification. I worked as a Research Assistant under the guidance of Prof. Luca Carloni and Prof. Ioannis Kymissis, in collaboration with the System Level Design Lab at Columbia and IBM Research NY focusing on thermal management for accelerator SoCs, where I developed a closed-loop controller using token-based throttling and sprinting. I also gained hands-on teaching and laboratory experience as a Graduate Teaching Assistant and Laboratory Assistant, contributing to coursework in computer architecture and Formal Verification. Previously, I worked at Synopsys Inc as an ASIC Digital Design Engineer for over 2.5 years, contributing to the design and development of analog circuits for DDR5-PHY, LPDDR5-PHY, and MRPHY. I also collaborated on critical tasks such as SVA assertion, RTL-LINT sign-off, and scripting to automate tool flows and regressions. I am currently looking for opportunities to leverage expertise in ASIC Design, System on a Chip (SoC), SystemVerilog, and clock distribution in future roles, while continuing to explore opportunities in cutting-edge technology and research initiatives.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and digital design.
Location: Boise, Idaho, United States
Experience: 3 yrs 4 mos
Skills
- Asic Design
- Digital Design
Career Highlights
- Expertise in ASIC Design and Digital Circuit Development.
- Hands-on experience in thermal management for SoCs.
- Strong foundation in formal hardware verification.
Work Experience
Micron Technology
Semiconductor Design Engineer (2 mos)
Scale AI
HFC Specialist (1 mo)
Columbia University
Graduate Teaching Assistant (3 mos)
Laboratory Assistant (4 mos)
Graduate Research Assistant (1 yr 3 mos)
Synopsys Inc
Technical Intern (3 mos)
Synopsys Inc
ASIC Digital Design Engineer (1 yr 11 mos)
Intern (Technical-Engineering) (5 mos)
Education
Master of Science - MS at Columbia University
Bachelor of Engineering - BE at Visvesvaraya Technological University
PUC at Narayana Junior College - India
High school at Narayana Olympiad school