Madhusudan Kumar

Software Engineer

Bhubaneswar, Odisha, India8 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Universal Verification Methodology (UVM) and System Verilog.
  • Strong background in digital design and verification.
  • Proficient in multiple high-speed interface protocols.
Stackforce AI infers this person is a Digital Design Engineer specializing in high-speed interface protocols and verification methodologies.

Contact

Skills

Core Skills

Universal Verification Methodology (uvm)System VerilogUsbPcie

Other Skills

Pipe interfaceCXL 2.0AXISerDesAssertionsCode Coveragefunctional coverageAPBVerilogAnalog VLSI design based on MOSFETCC++

Experience

8 yrs 11 mos
Total Experience
2 yrs 11 mos
Average Tenure
3 yrs
Current Experience

Synopsys inc

2 roles

R&D Engineering, Staff Engineer

Promoted

Jan 2024Present · 2 yrs 5 mos

Pipe interfaceCXL 2.0AXIUSBPCIeSerDes+10

R&D Engineer II

Jun 2023Jan 2024 · 7 mos

Asiczen technologies

2 roles

Digital Design Engineer-2

Jul 2021Jun 2023 · 1 yr 11 mos

USBAXI

Digital Design Engineer

Feb 2018Jun 2021 · 3 yrs 4 mos

PCIeSerDes

Learnyzen

Intern

May 2017Jan 2018 · 8 mos · Bhubaneshwar Area, India

Education

NIST University

B.TECH — Electrical and Electronics Engineering

Jan 2013Jan 2017

Dhanbad Public School, Dhanbad,Jharkhand

Intermediate — Science

Jan 2010Jan 2012

Lohia Nagar MT.Carmel High School,Patna,Bihar

Matriculation

Jan 2000Jan 2010

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