Subashkumar S — Software Engineer
Staff ASIC Digital Design Engineer with 8 years of hands-on experience in end-to-end ASIC IP development. • Strong expertise in micro-architecture, functional specification, and RTL implementation for reusable and configurable ASIC IPs. • Proven track record delivering high-performance AMBA IPs (AXI, AHB, APB) and audio interfaces (I2S, TDM, MIPI SoundWire I3S). • Extensive experience across the complete IP lifecycle: requirements, micro-architecture, RTL, CDC/Lint, synthesis, formal verification, debug, and release. • Specialized in high-frequency optimization, memory/FIFO architecture, and CDC-intensive IP designs. • Hands-on with Verilog/SystemVerilog, Synopsys EDA tools, timing-aware RTL, and silicon-ready design practices
Stackforce AI infers this person is a highly skilled ASIC Digital Design Engineer with expertise in high-performance IP development.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 10 mos
Skills
- Asic Ip Development
- Rtl Implementation
Career Highlights
- 8 years of ASIC IP development experience
- Expert in high-performance AMBA and audio interfaces
- Proficient in Verilog/SystemVerilog and Synopsys EDA tools
Work Experience
Synopsys Inc
Staff Engineer ASIC Digital Design (1 yr 4 mos)
Senior Engineer ASIC Digital Design (1 yr)
ASIC Digital Design Engineer ll (1 yr 6 mos)
Cerium Systems
RTL Design Engineer in vlsi (4 yrs)
Education
Bachelor of Engineering - BE at Government College of Technology, Coimbatore
