Yogeshgowda K

Software Engineer

Bengaluru, Karnataka, India3 yrs 1 mo experience
Highly Stable

Key Highlights

  • Expert in Analog and Mixed-Signal IC Design.
  • Proficient in Cadence Virtuoso Layout Editor.
  • Experience with major semiconductor clients.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog and Mixed-Signal ICs.

Contact

yogeshgowda.k7@gmail.comLinkedIn

Skills

Core Skills

Analog Layout DesignMixed-signal Ic Design

Other Skills

FloorplanningCadence Virtuoso Layout EditorStandard CellCMOSDesign Rule Checking (DRC)Layout Versus Schematic (LVS)RV CheckSemiconductors

Experience

3 yrs 1 mo
Total Experience
3 yrs 1 mo
Average Tenure
3 yrs 1 mo
Current Experience

Karmic design private limited manipal

2 roles

Design Engineer - 1

Nov 2023 – Present · 2 yrs 7 mos · On-site

  • Providing service to client "Texas Instruments"
Analog Layout DesignMixed-Signal IC DesignFloorplanningCadence Virtuoso Layout EditorStandard CellCMOS+4

Trainee Layout Engineer

May 2023 – Nov 2023 · 6 mos · On-site

Education

byMerit

Analog & Mixed Signal Layout Design — VLSI

Sep 2022 – Apr 2023

Visvesvaraya Technological University

Bachelor of Engineering - BE — Electronics and communication

Aug 2015 – Jul 2019

Stackforce found 100+ more professionals with Analog Layout Design & Mixed-signal Ic Design

Explore similar profiles based on matching skills and experience

DG

Daniel Giftson E

ASIC Design and Verification Engineer

at Ceremorphic, Inc.

Chennai, India1 yr 7 mos exp
RTL DesignFunctional VerificationMemory ControllersUniversal Verification Methodology (UVM)
MANIKANTA N

MANIKANTA N

A&MS Layout Design Engineer II

at Synopsys Inc

Mysore, India6 yrs 10 mos exp
Layout DesignMemory DesignHigh Speed SRAM Design
VS

Vanapalli Shanmukha sai

Trainee

at Maven Silicon

Tanuku, India0 mo exp
Brunda M N

Brunda M N

Research And Development Engineer

at Synopsys Inc

Bengaluru, India6 yrs 9 mos exp
CharacterizationVery-Large-Scale Integration (VLSI)
JATIN K.

JATIN K.

Senior Analog Design Engineer

at Synopsys Inc

Delhi, India3 yrs exp
IP developmentDigital Designs
Meri Margaryan

Meri Margaryan

Senior Analog Design Engineer

at Synopsys Inc

Yerevan, Armenia5 yrs 2 mos exp
Mixed-Signal IC DesignRobotics
Trí Võ Minh

Trí Võ Minh

Senior Layout Engineer

at Marvell Technology

Ho Chi Minh City, Vietnam1 yr 9 mos exp
Layout DesignAnalog Mixed Signal DesignMixed-Signal IC Design
Abhishek Anand

Abhishek Anand

Analog Engineer

at Synopsys Inc

The Hague, Netherlands2 yrs 2 mos exp
Analog Circuit DesignPower Electronics