Vaibhav Baldua

Software Engineer

Noida, Uttar Pradesh, India2 yrs 11 mos experience
AI ML PractitionerAI Enabled

Key Highlights

  • Expert in developing Verification IPs for advanced protocols.
  • Strong foundation in Functional Verification and UVM methodologies.
  • Proficient in multiple programming languages including Python and Elixir.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in Functional Verification and IP Development.

Contact

LinkedIn

Skills

Core Skills

Functional VerificationIp Verification

Other Skills

Ethernet Verification IPVerification IP R&DUVMVerilogUniversal Verification Methodology (UVM)System verilogRTL DesignRTL VerificationFunctional ProgrammingPython (Programming Language)ElixirDigital DesignDigital ElectronicsDigital Signal ProcessingFormal Verification

About

Developing Verification IPs for ethernet, ultra ethernet, JESD204 and MIL 1553

Experience

2 yrs 11 mos
Total Experience
2 yrs 11 mos
Average Tenure
2 yrs 11 mos
Current Experience

Siemens eda (siemens digital industries software)

2 roles

Senior Member of Technical Staff

Promoted

Dec 2024 – Present · 1 yr 6 mos · Noida, Uttar Pradesh, India · On-site

Member of Technical Staff

Jul 2023 – Dec 2024 · 1 yr 5 mos · Noida, Uttar Pradesh, India · On-site

  • Working in Ethernet Verification IP R&D team
Ethernet Verification IPVerification IP R&DFunctional VerificationIP Verification

Nxp semiconductors

Intern

Jan 2023 – Jun 2023 · 5 mos · Noida · On-site

VerilogUniversal Verification Methodology (UVM)Functional Verification

Education

Birla Institute of Technology, Mesra

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Jan 2019 – Jan 2023

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