A

Ashwin B A

Software Engineer

Bengaluru, Karnataka, India5 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 5+ years in Emulation & Design Verification roles.
  • Expertise in complex IP/subsystems.
  • Proficient in Verilog and SystemVerilog.
Stackforce AI infers this person is a VLSI Design Verification Engineer with expertise in Emulation and IP Verification.

Contact

LinkedIn

Skills

Core Skills

EmulationIp Verification

Other Skills

ZeBuSimulation AccelerationUniversal Verification Methodology (UVM)Functional VerificationVCSDisplaySystemVerilogCode CoverageApplication-Specific Integrated Circuits (ASIC)System on a Chip (SoC)VerilogCMicrosoft OfficeTeamworkLeadership

About

Adept professional with experience of 5+ years in Emulation & Design Verification roles working on complex IP/subsystems. - HDL/HVL: Verilog, SystemVerilog - Emulator platform: Zebu ZS5/4/3 Master of Engineering(ME) in VLSI Design - Manipal Academy of Higher Education

Experience

5 yrs 3 mos
Total Experience
2 yrs 7 mos
Average Tenure
3 yrs 10 mos
Current Experience

Intel corporation

GPU Design Verification Engineer

Aug 2022 – Present · 3 yrs 10 mos · Greater Bengaluru Area · Hybrid

EmulationZeBuIP Verification

Mirafra technologies

Verification Engineer I

Mar 2021 – Aug 2022 · 1 yr 5 mos · Greater Bengaluru Area · Hybrid

Ensilica

Intern

Jul 2019 – Aug 2020 · 1 yr 1 mo · Bengaluru, Karnataka, India

Education

Manipal School of Information Sciences

Master of Engineering — VLSI Design

Visvesvaraya Technological University

Bachelor of Engineering — Electronics and Communication Engineering

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