Aravinda Swamy Gopagani

Software Engineer

Hyderabad, Telangana, India3 yrs experience
Highly Stable

Key Highlights

  • Pursuing M.Tech in VLSI System Design.
  • Completed Advanced VLSI Design and Verification course.
  • Hands-on experience with live VLSI projects.
Stackforce AI infers this person is a VLSI Design and Verification Engineer with practical experience in hardware emulation and verification.

Contact

LinkedIn

Skills

Core Skills

Rtl Verification

Other Skills

fpgaZebuHardware EmulationVerilogDigital Logic DesignSystemVerilogUniversal Verification Methodology (UVM)Object-Oriented Programming (OOP)Shell ScriptingOperating System: UNIX and WINDOWSFunctional VerificationAssertionsAMBA APB ProtocolEDA Tool : ModelsimXilinx ISE

About

Looking for an entry-level position in VLSI domain(Design and Verification Engineer) where I can utilize my extensive knowledge about the area gained during my Graduation and Post Graduation. Currently Iam pursuing my M.Tech in VlSI System Design. I have completed Advanced VLSI Design and Verification course. I have experience working on live projects in VLSI

Experience

3 yrs
Total Experience
3 yrs
Average Tenure
3 yrs
Current Experience

Synopsys inc

2 roles

Application Engineer - II

Jun 2023 – Present · 3 yrs · Hyderabad, Telangana, India

Internship Trainee(ZEBU - Product Validation)

Sep 2022 – May 2023 · 8 mos · Hyderabad, Telangana, India

RTL Verificationfpga

Education

Siddhartha Institute of Technology & Science

Master of Technology - MTech — VlSI System Design

Jul 2019 – Jan 2022

Nalla Malla Reddy Engineering College

Bachelor of Technology - BTech

Jan 2015 – Jan 2019

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