R

Ranu Mishra

Product Manager

Bankura, West Bengal, India4 yrs 2 mos experience

Key Highlights

  • Specializes in IP/SOC verification and digital design.
  • Hands-on experience with SystemVerilog and UVM.
  • Passionate about cutting-edge semiconductor technologies.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in VLSI solutions.

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Skills

Core Skills

Ip Verification (sv, Uvm)Digital Design (rtl, Verilog)

Other Skills

Shell ScriptingUniversal Verification Methodology (UVM)VerdiPython (Programming Language)C (Programming Language)VHDLDigital ElectronicsComputer Networking

About

As a Senior R&D Engineer with hands-on experience in IP/SOC Verification, SystemVerilog, UVM, and digital design, I specialize in building verification environments and contributing to high-performance VLSI solutions. With a strong academic foundation in Electronics and over 3 years of industry experience, I thrive in fast-paced engineering environments where precision, innovation, and problem-solving are critical.I am passionate about working on cutting-edge semiconductor technologies, optimizing verification flows, and contributing to end-to-end product development. I enjoy collaborating with cross-functional teams and constantly upskilling to stay aligned with industry advancements.Key strengths: IP Verification (SV, UVM)Digital Design (RTL, Verilog) Debugging using Verdi Shell Scripting ,automation.High ownership, analytical problem-solving, and teamwork. Always open to learning, collaborating, and contributing to impactful engineering work in the semiconductor ecosystem.

Experience

4 yrs 2 mos
Total Experience
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Average Tenure
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Current Experience

Synopsys inc

Senior Research And Development Engineer

Jun 2023Present · 3 yrs · Bhubaneswar, Odisha, India

Shell ScriptingUniversal Verification Methodology (UVM)IP Verification (SV, UVM)

Asiczen technologies

Digital Design Engineer-1

Mar 2022May 2023 · 1 yr 2 mos · Bhubaneswar, Odisha, India

Digital Design (RTL, Verilog)

Education

University of Calcutta

M.Sc — Electronic science

Jan 2019Jan 2021

The University of Burdwan

Bachelor of science — Electronics honours

Jun 2016Mar 2019

University of Calcutta

Master's degree — Master's Degree Project -organic material based resistive random access memory

Aug 2020Present

Stackforce found 100+ more professionals with Ip Verification (sv, Uvm) & Digital Design (rtl, Verilog)

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