Sabiha Tanveez — Software Engineer
- Digital Design Engineer with hands-on experience in RTL design using Verilog. - Skilled in identifying and resolving lint, CDC, and RDC violations using tools like SpyGlass and VC SpyGlass to ensure high-quality, robust designs. - Familiar with Register Abstraction Layer (RAL) modeling and verification methodologies. - Proficient in synthesis and formal verification, including formality checks, with a strong understanding of design equivalence. - Hands-on experience on Scan Insertion, DRC Check and Spyglass DFT. - Sound knowledge on MBIST, JTAG and ATPG Concepts. - Worked on UFS, USB and Ethernet (MAC) protocols.
Stackforce AI infers this person is a Digital Design Engineer specializing in ASIC design and verification.
Location: Bengaluru, Karnataka, India
Experience: 3 yrs
Skills
- Rtl Design
- Dft
Career Highlights
- Expert in RTL design and verification methodologies.
- Proficient in DFT and formal verification techniques.
- Hands-on experience with multiple protocols including UFS and USB.
Work Experience
Synopsys Inc
Asic Digital Design, Senior Engineer (1 mo)
ASIC Digital Design Engineer 1 (3 yrs)
DFT Intern at Synopsys (1 yr)
Education
Bachelor of Technology - BTech at SR Engineering College
Diploma of Education at Govt. Polytechnic, Warangal
SSC at Bishop Beretta high School