Vrajesh Rojivadiya — Software Engineer
Digital Electronics has always been a fascination.I was always amazed by the world of 1s & 0s and tried to have a positive Logic in life. This digital would is a testimony of the contribution of VLSI industry. I proud to contribute to this industry with my acquired skills set and knowledge. # Proficient in developing SV/UVM testbenches and writing robust test cases. # Strong expertise in UVM methodology, SV Assertions, and functional coverage. # Expertise in RTL/Testbench/Test/SVA debugging. # Hands-on experience in coverage-driven verification # Experience in owning and driving verification of feature/block # Strong expertise in PCIe protocol (flit mode and non-flit mode) # Solid foundation in Digital & Logic Design concepts. # Good experience in collaborating with cross-functional teams. # Proficient in developing automation scripts to optimize verification workflows. # Experience in designing AI agents that streamline day-to-day verification work, from auto-debugging failing tests to generating testbench boilerplate, saving hours of manual effort.
Stackforce AI infers this person is a VLSI verification engineer with strong expertise in ASIC and PCIe technologies.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 7 mos
Skills
- Application-specific Integrated Circuits (asic)
- Universal Verification Methodology (uvm)
- Rtl Verification
Career Highlights
- Proficient in SV/UVM testbench development.
- Strong expertise in PCIe protocol.
- Hands-on experience in coverage-driven verification.
Work Experience
Synopsys Inc
ASIC Digital Design Verification, Staff Engineer (3 yrs 8 mos)
Intel Corporation
Design Verification Engineer (10 mos)
Maven Silicon
Internship Trainee (1 yr 1 mo)
Education
Bachelor of Engineering - BE at Gujarat Technological University
