Kashyap Amboju

DevOps Engineer

Union City, California, United States12 yrs 5 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Performance Modeling and Bottleneck Analysis.
Proficient in C++ and Python for hardware architecture.
Experienced in GPU and Memory subsystem architecture.

Stackforce AI infers this person is a Hardware Performance Architect with expertise in GPU and Memory technologies.

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Skills

Core Skills

Performance ModelingMicroarchitecture ExplorationGraphics SimulatorBottleneck AnalysisTechnical SupportContent Management System

Other Skills

ASICAlgorithmsApplication-Specific Integrated Circuits (ASIC)CC++Competitive analysisCycle accurate modelingData StructuresDebuggingFPGAField-Programmable Gate Arrays (FPGA)GitGraphics Processing UnitHardware ArchitectureHospitality Browser

About

Highly motivated Computer Architecture enthusiast, experienced at Performance Modelling, Bottleneck Analysis with proficiency in programming languages such as C++, Python and knowledge in Graphics Pipeline Architecture, seeking to further my experience in Hardware industry.

Experience

12 yrs 5 mos

Total Experience

3 yrs 1 mo

Average Tenure

5 yrs

Current Experience

Amd

Memory Subsystem Performance Architect

Jun 2021 – Present · 5 yrs · Portland, Oregon, United States

Serve as a Performance Architect in AMD's Electronics Design Engineering team
Participate in Microarchitecture exploration, Performance Modeling, and Analysis for next generation Memory technologies, Scalable Interconnects, and Quality-of-Service.
Intimately understand Design Architecture and propose solutions to enhance Performance.
Responsible for micro-benchmarking, workload characterization, competitive analysis,
bottleneck identification, and optimization. Develop tools and methodology for performance
analysis of workloads
Communicate, propose, and implement solutions to processor and system performance issues.

Performance ModelingBottleneck AnalysisMicroarchitecture explorationQuality-of-ServiceMicro-benchmarkingWorkload characterization+3

Intel corporation

GPU Performance Architect

Mar 2016 – Jun 2021 · 5 yrs 3 mos · Portland, Oregon, United States

Model Cycle accurate on-chip Cache Controller in Graphics Simulator and implement new
features on different Graphic Skews and Generations.
Technical Decisions on Design Approaches for new implementations while Abstracting Micro Architectural details in Simulator modeling for a quick turnaround when necessary.
Bottleneck Analysis to Debug Performance on Micros and Graphic Benchmarks such as Game UI, Machine Leaning Workloads etc.
Analyze results of Performance Studies for different Micro-Architectural configurations.

Cycle accurate modelingGraphics SimulatorBottleneck AnalysisPerformance StudiesMicro-Architectural configurations

Qualcomm

CPU Verification Intern

May 2015 – Aug 2015 · 3 mos · Raleigh-Durham, North Carolina Area

Samsung r&d institute delhi

Senior Software Engineer

Jul 2012 – Jun 2014 · 1 yr 11 mos

Worked on Samsung Content Management System. My responsibilities included Technical Support to Samsung Smart Signage Platform in Samsung Large Format Displays (LFD) and Hospitality Browser in Samsung Smart TV.

Technical SupportContent Management SystemSmart Signage PlatformHospitality Browser