K

Kousalya Indravath

Product Engineer

Bengaluru, Karnataka, India4 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expert in physical design flow and GDS generation.
  • Proficient in TCL and static timing analysis.
  • Strong background in block level implementation.
Stackforce AI infers this person is a Physical Design Engineer specializing in Electronics Design.

Contact

LinkedIn

Skills

Core Skills

Physical DesignStatic Timing AnalysisBlock Level Implementation

Other Skills

TCLDebuggingTimingPlace & RouteMatlabCadence VirtuosoElectronics DesignMicrosoft ExcelC (Programming Language)Microsoft OfficeMicrosoft WordMicrosoft PowerPointXilinx VivadoArduinoHTML

About

To excel in my field through sheer determination, hard work, smartness and associate myself in an organization which would provide me with a good opportunity to improve my knowledge.

Experience

4 yrs 10 mos
Total Experience
4 yrs 10 mos
Average Tenure
4 yrs 10 mos
Current Experience

Mediatek

2 roles

Senior Design Engineer

Promoted

Jul 2021 – Present · 4 yrs 10 mos · Bengaluru, Karnataka, India · On-site

  • Works on Complete Physical Design Flow till GDS.
TCLStatic Timing AnalysisPhysical Design

Physical Design Engineer

Aug 2020 – Jun 2021 · 10 mos · Bengaluru, Karnataka, India · On-site

  • Block Level Implementation of Physica Design starts from Floor plan, Placement, Clock Tree Synthesis, Routing and signoff and finally GDS Generation.
TCLStatic Timing AnalysisPhysical DesignBlock Level Implementation

Education

National Institute of Technology Warangal

Master's degree — VLSI

Aug 2019 – Jun 2021

RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID

Engineer's degree — ECE

Jul 2015 – May 2019

RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID

PUC — MPC

Jul 2013 – May 2015

ZPHS bangarugadda

SSC

Jun 2012 – May 2013

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