Manikanta Kopparapu — Software Engineer
Having around 7+ year's of experience in various disciplines. 4 year's in both SOC/ IP Design & Verification, which includes developing RTL coding, Test Bench (driver, monitor & score board components), creating the test cases & integration. 3 year's in Pre Silicon Power Simulations & Post Silicon Validation (Running power simulations using PTPX tool and extracting the power numbers for the defined SOC level KPI's). Created the Power Architecture by discussing with the relevant stake holders. Integrated the Power Components & Connections in the SS for the created Power Architecture. Estimating the power numbers for the new age projects based on the legacy projects results by discussing the cross functional teams. Having exposure & Hands on Experience to RTL checks like lint, Synth, Low Power Tool CLP, UPF methodology. Having Hands on experience in SS Level Integration.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in SOC design and power optimization.
Location: Hyderabad, Telangana, India
Experience: 8 yrs 7 mos
Skills
- Soc Verification
- Low Power Design
- Power Simulations
- Rtl Coding
- Uvm Test Bench Development
Career Highlights
- 7+ years of experience in SOC design and verification.
- Expertise in power simulations and validation.
- Proficient in UVM and RTL coding methodologies.
Work Experience
Qualcomm
Sr Lead Engineer (1 yr)
Silicon Labs
Senior Engineer at Silicon Labs (3 yrs 2 mos)
Engineer (2 yrs 5 mos)
HCL Technologies
SOC Verification Engineer (2 yrs)
Education
Master’s Degree at Vellore Institute of Technology
B.Tech at SVIST Engineering College
Intermediate at Narayana Junior College
S.S.C at Nagarjuna High school