Manoj Sharma Tanikella

Software Engineer

Bengaluru, Karnataka, India12 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expert in SoC Architecture and Functional Verification.
  • Proficient in developing Verification Environments from scratch.
  • Strong debugging skills in complex SoC Verification.
Stackforce AI infers this person is a SoC Verification Engineer with expertise in high-speed interconnects and verification methodologies.

Contact

Skills

Core Skills

Soc ArchitectureFunctional Verification

Other Skills

High Speed Interconnect verificationDebuggingVerification EnvironmentsUVMMIPIUFSBus protocolsAXICache CoherencySystem VerilogVerilogCSystem VerificationUniversal Verification Methodology (UVM)Python

About

+ SoC Architecture and Functional verification + Coherent High Speed Interconnect verification + Good debugging skills in SoC Verification. + Developed Verification Environments from scratch for IP/SS level Verification in UVM + IP/SS level Verification + Experience in developing VIP and Test Suites from scratch + Good knowledge in MIPI, UFS and Bus (CHI, AXI, AHB, APB) protocols + Proficient in verilog, system verilog and Object Oriented Programming + UVM/OVM based Verification

Experience

12 yrs 7 mos
Total Experience
4 yrs 3 mos
Average Tenure
4 yrs
Current Experience

Qualcomm

3 roles

Senior Staff Engineer/Manager

Dec 2024Present · 1 yr 5 mos · Bengaluru, Karnataka, India

SoC ArchitectureFunctional verificationHigh Speed Interconnect verificationDebuggingVerification EnvironmentsUVM+3

Staff Engineer/Manager

Promoted

Jun 2024Dec 2024 · 6 mos · Bengaluru, Karnataka, India

Staff Engineer

May 2022Jun 2024 · 2 yrs 1 mo · Bengaluru, Karnataka, India

Intel corporation

2 roles

Staff Verification Engineer

Apr 2022May 2022 · 1 mo

Senior SoC Verification Engineer

Jul 2019Apr 2022 · 2 yrs 9 mos

Synopsys inc

3 roles

Verification Engineer, R&D SR II

Promoted

Jun 2018Jun 2019 · 1 yr

Verification Engineer, SR I

Dec 2015May 2018 · 2 yrs 5 mos

Verification Enginner, R&D II

Jun 2013Nov 2015 · 2 yrs 5 mos

  • 1. Thorough knowledge on Flash memories (UFS, UME), MIPI Protocols (CPHY, DPHY, SPMI, RFFE, CSI2 and DSI).
  • 2. Verification IP development for the above protocols
  • 3. Developed verification environments and Test Suites.
  • 4. Methodologies - UVM/OVM, Language - Verilog and System Verilog

Education

National Institute of Technology, Tiruchirappalli

Master's degree — VLSI

Jan 2011Jan 2013

Gayatri Vidya Parishad College of Engineering (Autonomous), 530048(CC-13)

Bachelor of Engineering - BE

Jan 2007Jan 2011

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