Manoj Y

Software Engineer

Bengaluru, Karnataka, India3 yrs 9 mos experience
Highly Stable

Key Highlights

  • Successfully contributed to complex DDR5 projects
  • Recognized with quarterly award for Gen2-MRCD project
  • Strong collaboration with architecture teams for feature verification
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in DDR5 technologies.

Contact

Skills

Core Skills

Systemverilog

Other Skills

Universal Verification Methodology (UVM)I2CDDR5DRAMCommunication

About

After the completion of engineering, it was time for me to start working and make most of the opportunities I get. When I joined Rambus, it was the start of new journey for me. After getting an environment thriving with passionate engineers - fellow colleagues, who were ready to share their knowledge without a second thought, it was on me to grasp it. Over the years I tried my best to use every opportunity I get, to learn, to prove my self and to grow. Being able to contribute to the complex projects like RCD and MRCD by developing testbench components in the early stage of my career was totally a luck. I can’t say anything more than “THANKS” to seniors of Rambus for such an opportunity. “Quarterly recognition award” given for my work in Gen2-MRCD project in 2024, was just a bi-product of, my Manager/Team Lead Neethish Agari’s trust in my capability and my effort to keep the trust. As the life goes on, I’m ready to embrace new challenges every day.

Experience

3 yrs 9 mos
Total Experience
3 yrs 5 mos
Average Tenure
4 mos
Current Experience

Nvidia

Senior Verification Engineer

Jan 2026Present · 4 mos · Bengaluru, Karnataka, India · On-site

  • Looking forward to the learning and challenges ahead!!!
SystemVerilogUniversal Verification Methodology (UVM)

Rambus

3 roles

MTS Verification Engineer

Sep 2023Jan 2026 · 2 yrs 4 mos · Bengaluru, Karnataka, India

  • Verification of DDR5 Gen2-MRCD.
  • Developed Host driver with MuxMode logic for command driving.
  • Developed Host monitor for data path of MRCD modelling complex features like Scrambling, CRC, PowerSaving modes, Parity and BCOM data path.
  • Verification of key JEDEC features.
  • Involve in discussions with Architecture team and transfer understandings to team members so as to help them in verification.
  • Understand MRDIMM System to get holistic understanding of MRCD standalone Verification.
  • Verification of DDR5 RCD (Gen4/Gen5).
SystemVerilogI2C

AMTS Verification Engineer

Promoted

Aug 2022Sep 2023 · 1 yr 1 mo · Bengaluru, Karnataka, India

  • Verification of DDR5 RCD(Gen2/Gen3).
  • Taking Up verification of new features
  • Understand the feature and System requirements in depth from discussions with Architecture team.
  • Prepare Vplan, Checker Plan and Successful verification of feature within tapeout date.
SystemVerilogI2C

Intern-Logic Verification

Mar 2022Aug 2022 · 5 mos · Bengaluru, Karnataka, India

  • I'm glad to say that I joined Rambus Chip Technologies as an Intern in Logic Verification. Looking at better future in the Industry.

Education

RV College Of Engineering

Bachelor's degree — Electronics and Communications Engineering

Jan 2018Jan 2022

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